International Federation for Information Processing. WG 10.5
| schema:name | "International Federation for Information Processing. WG 10.5" |
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"IFIP. WG 10.5" |
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<https:/ |
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schema:parent |
International Federation for Information Processing. Technical Committee 10 |
Inverse relations
[ .. ] → schema:author → International Federation for Information Processing. WG 10.5
Logic and architecture synthesis : proceedings of the IFIP TC10/WG10.5 workshop on logic and architecture synthesis, Paris, France, 30 May-1 June 1990 / ed. by Petra Michel, Gabrielle Saucierschema:ProductModel
Representations of discrete functions / ed. by Tsutomu Sasao, Masahiro Fujitaschema:ProductModel
SOC design methodologies : IFIP TC10/WG10.5 eleventh international conference on very large scale integration of systems-on-chip (VLSI-SOC'01), December3-5, 2001, Montpellier, France / ed. by Michel Robert ... [et al.]schema:ProductModel
VLSI 83 : VLSI design of digital systems : proceedings of the IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration, Trondheim, Norway, 16-19 August 1983 / ed. by F. Anceau and E.J. Aasschema:ProductModel
VLSI 85 : VLSI design of digital systems : proceedings of the IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration, Tokyo, Japan, 26-28 August 1985 / ed. by E. Hörbstschema:ProductModel
VLSI 87 : VLSI design of digital systems : proceedings of the IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration, Vancouver, Canada, 10-12 August 1987 / ed. by Carlo H. Séquinschema:ProductModel
VLSI 91 : proceedings of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, Edinburgh, Scotland, 20-22 August 1991 / ed. by A. Halaas, P.B. Denyerschema:ProductModel
VLSI 93 : proceedings of the IFIP TC10/WG10.5 international conference on very large scale integration, Grenoble, France, 7-10 September 1993 / ed. by Takayuki Yanagawa, Peter A. Ikeyschema:ProductModel
VLSI: systems on a chip : IFIP TC10 WG10.5 tenth international conference on very large scale integration (VLSI '99), December 1-4, 1999, Lisboa, Portugal / ed. by Luis Miguel Silveira, Srinivas Devadas, Ricardo Reisschema:ProductModel
Wafer scale integration, II : proceedings of the Second IFIP WG 10.5 Workshop on Wafer Scale Integration, Egham, England, 23-25 September 1987 / ed. by R.M. Leaschema:ProductModel
[ .. ] → schema:contributor → International Federation for Information Processing. WG 10.5
Architecture and design of distributed embedded systems : IFIP WG10.3/WG10.4/WG10.5 international workshop on distributed and parallel embedded systems (DIPES 2000), October 18-19, 2000, Schloß Eringerfeld, Germany / ed. by Bernd Kleinjohannschema:ProductModel
Designing correct circuits : proceedings of the second IFIP WG 10.2/WG 10.5 workshop on designing correct circuits Lyngby, Denmark, 6-8 january 1992 / ed. by Jørgen Staunstrup, Robin Sharpschema:ProductModel
Distributed and parallel embedded systems : IFIP WG10.3/WG10.5 international workshop on distributed and parallel embedded systems (DIPES'98), October 5-6, 1998, Schloß Eringerfeld, Germany / ed. by Franz J. Rammigschema:ProductModel
Electronic design automation frameworks : when will the promise be realized? : proceedings of the third IFIP WG 10.2/WG 10.5 Workshop on Electronic Design Automation Frameworks in cooperation with GI/ITG FG 3.5.6/5.2.6 Bad Lippspringe, Germany, 23-25 March, 1992 / general chair Mike Newman ; ed. Tom Rhyneschema:ProductModel
Synthesis for control dominated circuits : selected papers from the IFIP WG10.2/WG10.5 workshops, Grenoble, France, April and September 1992 / ed. by Gabrièle Saucier, Jacques Trilheschema:ProductModel