Logic and architecture synthesis : proceedings of the IFIP TC10/WG10.5 workshop on logic and architecture synthesis, Paris, France, 30 May-1 June 1990 / ed. by Petra Michel, Gabrielle Saucier

rdfs:label "Logic and architecture synthesis : proceedings of the IFIP TC10/WG10.5 workshop on logic and architecture synthesis, Paris, France, 30 May-1 June 1990 / ed. by Petra Michel, Gabrielle Saucier"
schema:name "Logic and architecture synthesis : proceedings of the IFIP TC10/WG10.5 workshop on logic and architecture synthesis, Paris, France, 30 May-1 June 1990"
schema:author International Federation for Information Processing. WG 10.5
schema:contributor Michel, Petra
Saucier, Gabriè€le
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http://purl.org/dc/terms#issued "1991"
schema:about computernetwerken
systeemontwikkeling (informatica)
elektronische schakelingen
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schema:inLanguage "en"
schema:isbn "0444890238"
schema:numberOfPages 337
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