Formal methods for the verification of digital circuits / Cornelis Arnoldus Josephus van Eijk
Proefschrift Technische Universiteit Eindhoven
| rdfs:label | "Formal methods for the verification of digital circuits / Cornelis Arnoldus Josephus van Eijk" |
| schema:name | "Formal methods for the verification of digital circuits" |
| schema:author | Eijk, Cornelis Arnoldus Josephus van (1970-) |
| schema:description | "Proefschrift Technische Universiteit Eindhoven" |
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schema:same |
<http:/ |
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schema:main |
<https:/ |
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http:/ |
"1997" |
| schema:about | Connections |
| Digitale systemen | |
| digitale techniek | |
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<http:/ |
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| Ontwerpen | |
| elektronische schakelingen | |
| Verification | |
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schema:in |
"en" |
| schema:isbn | "9038603703" |
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schema:number |
144 |
| schema:publication |
<https:/ |